I forgot to mention in the last post that it was my close friend, Sameer, who inspired me to write about my PS..
Thanks buddy..
This post is all about what really matters to me the most..
TI life:
Morning 9 am, I enter TI , see people standing peacefully in the que for breakfast. Everybody selects his/her favourite food item. Cafeteria is clean, well decorated. The contractor respectfully treats you, remembers what's your favourite food. I have breakfast and start walking towards my cubicle. Everybody seems lazy and yawning. Nobody seems to care.
I reach my cubicle on the fourth floor, start my day looking at e-mails, occasionally check the results of the previous day's work and in a while, I am all geared up for work. Suddeny, I feel the floor getting crowded and everybody getting back to their respective cubicles, which they, mostly half heartedly, have left on the previous day. Cubicles are unique places that convey you a lotta information about the person. I see one cubicle filled with marrage photographs all around, another with couple of teddy bears. I start working and after a while, I feel the urge to go to the pantry. A couple of collegues and I go for a coffee. After chatting over myriad issues and reading newspapers, we come back. On our way back, we see people working, walking around to attend a meeting, talking over IP phones and discussing architectures inside well furnished team rooms. After the little break, I resume work. I talk to my mentors a couple of times over the phone, or go to their cubicles for the same. I find my mentors to be friendly people. They are really helpful and they tell me exactly what I need to know. I can argue with them without any inhibitions. My work requires a lot of research and in-depth knowledge of software tools. Most of the interns here are working in projects concerning R & D.
Afternoon generally the most difficult times. Heavy lunch worsens the situation. Afternoons are generally spent in chatting or in playing Table Tennis at Texins (club).
Evenings, for me , are the most pleasant times. They inspire creative work! They make ideas flow. So, generally I keep working till late evenings.
So this is my routine. You must be wondering, "huh.. how does this matter? Everybody does this".
I will come to the point.
Texas Instruments is one such company that keeps up the engineering spirit. I always wondered before PS how exactly can research work be done by working in companies. I never really believed that hardcore electronics work can be carried out in the professional environment of the semiconductor companies. And now, I am convinced to say "yes..this is possible. TI provides a research environment". I had always been unhappy with the facilities and infrastucture at BITS. But TI is different. It is a company which truly respects its engineers. Innovation is not just accepted, but also motivated. Innovation can only come through freedom, and I think people here know it well. People work with targets and not with time. Employees can have a vacation in between two pre-decided tasks. Work goes on smoothly. If a certain software tool is not capable to perform a task, TI guys would come up with their own scripts to overcome the difficulty. Engineers are just expected to Engineer...and the rest is taken care by TI.
Sometimes, I wonder what do I want from my life. I can become an investment banker, earn a heavy salary and do the work which I dislike (or maybe, which I hate). On the other hand, I can spend rest of my life working in a hardcore research and development environment and earn a lot less. I think I would choose the latter. It is the real engineering work which can actually satisfy my soul. That is something which can make and keep me happy.
This is what matters! Isn't it?
Tuesday, September 16, 2008
Wednesday, August 6, 2008
Practice School 2 (PS2)
Formal Introduction to PS2-
Well, to put it in a simple way, Practice School is a program organized by our college (Birla Institute of Technology and Science) which consists of an internship in a company for round about six months.
It is supposed to be an excellent platform for students to have an industrial experience in companies of their respective branches.
Further, if you choose to go for PS2 in the second semester, you have a high chance of getting placed in the same company. Provided the current status of placements at BITS-Goa, it is an excellent opportunity.
The procedure of company selection is totally dependant upon one's CGPA , stream and preferences, which sucks (sorry for the word..its supposed to be FORMAL intro..you generally don't use such a language when it comes to formal) in a way, as companies don't get to test the aptitude of the people they are taking in. On the other hand, its not possible for BITS either to invite so many companies on the campus to select students, as they have to place all of them at some place or the other!
Informal GYAAN about PS-2:
Okay, so we are finally done with the boring part, and now, its time to move on.
I got into Texas Instruments (TI) for PS-2. I don't want to discuss the details about TI, its achievements, culture, pioneering attitude and innovation. If you are still not convinced, you can google it.
The only thing I care about is the experience I am gaining! Oh boy, TI is awesome. Things get going pretty fast here..provided my previous experience of PS-1 at Bharat Forge, Pune (world's 2nd largest forging comapny), I feel that I have landed in heaven! Moreover, you get a stipend, which is pretty decent.
Within first two weeks, I had been through the theory, lectures, presentations and had the initial hands-on session with necessary softwares. I had a very fast ramp-up, and whoa, to be precise, on my 18th day at TI, I was introduced to my part of project. I was alloted DFT (Design for Testability) department. The purpose of this team is to ensure that the integrated cicuit (IC) or , the chip, is testable after production. This checking not just includes functional checking. eg for a 2 input AND gate, feed 1 and 1 as inputs and check if the output is 1. Its simply uneconomical to check the present chips that way. Because, these chips have hundreds of inputs. So, to check a chip, you will have to feed (2 ^ no. of inputs) patterns. That is, for 100 pins, you wil have to check the chip for 2^100 times, which is ridiculous! So, what they do, is to have an internal set of hardware which would check the chip with fewer number of patterns. DFT team 'inserts' this hardware to the mainstream architecture! My work is based upon a newer version of the OMAP architecture.
Being a techie, I would (though you would not) like to go into the details. OMAP is an architecture developed by TI which is highly used in more than 50% of the smartphones currently being marketed. Smartphones are the phones which have the ability to be programmed. That means, you can develop your own applications on a smartphone with your own style and flavor. Ofcourse, you need to own a smartphone for that! The major distinguishing factor is multimedia support. e.g nokia 1100 is not a smartphone, while nokia 6600 is a smartphone.
OMAP series has a lots of chips. I will be working on OMAP 3430. It is the most recent in the series. Consists of SGX (graphics acclerator), ISP (Image signal processor), IVA2+ (Image video-audio accelerator), high-speed USB 2.0, S-video output, 3G wireless support and a lot of stuff which is too hi-fundoo..
Now, lets turn to my project. OMAP architecture is going to be used in home appliances. My aim will be to reduce the power consumption which occurs during testing the chip. The disturbing thing in this industry is the test cost! For almost all the SoCs (System on Chip), the testing cost is almost comparable to the manufacturing cost! By the way, the testing here does not just mean to check the chip's functionality. Here, it also stands for determining where exactly, that is at which node , it is failing. Oh my God! Let's consider the average area of the chip to be about 4 sq cm (thats too high!, just for the sake of analysis, let's make the assumption). In this chip, there are millions of gates (transistors). Each gate has aleast two transistors. Each transistor has 3 nodes. And these guys determine which of these nodes is failing to work! I guess by now one can realize how intricate this whole stuff is. So, for such a thorough analysis, some hardware is introduced in the chip. Now, the question that arises is, is it worth having an extra area for this hardware at the cost of chip area which is a primary concern these days? Yes, it is. It is extremely necessary to have the chips being sent out to be reliable. The cost of a single tester is more than $5 million! And every two years, due to the advanced technology, these testers are either replaced or modified. So, if you try calculating the cost per chip for testing per second, its pretty high. So, testing time is a measure concern.
Further, there is a trade off between test time and test power consumption. So, when you reduce test-time, the test power consumption can rise too high. It can infact be more than the chip's functional power consumption! Generally, when the chip is functional, the power supply to the part of the chip which is not active is disconnected. During testing, however, this is not possible.
So, my work is mostly oriented towards reducing this test power. And, while doing that, inevitably, I have to increase the number of patterns required, thereby increasing the testing time. The basic strategy here is to bypass a few scan chains so as to reduce the power consumption. DFT team has come with such an architecture, has infact, received patents. My objective now, is to add a pipeline to this architecture,as the tools here, do not support pipelines by default. The primary use of the pipelines is for the data stability during testing.
This is how much it is now! Let's see how it goes!
Well, to put it in a simple way, Practice School is a program organized by our college (Birla Institute of Technology and Science) which consists of an internship in a company for round about six months.
It is supposed to be an excellent platform for students to have an industrial experience in companies of their respective branches.
Further, if you choose to go for PS2 in the second semester, you have a high chance of getting placed in the same company. Provided the current status of placements at BITS-Goa, it is an excellent opportunity.
The procedure of company selection is totally dependant upon one's CGPA , stream and preferences, which sucks (sorry for the word..its supposed to be FORMAL intro..you generally don't use such a language when it comes to formal) in a way, as companies don't get to test the aptitude of the people they are taking in. On the other hand, its not possible for BITS either to invite so many companies on the campus to select students, as they have to place all of them at some place or the other!
Informal GYAAN about PS-2:
Okay, so we are finally done with the boring part, and now, its time to move on.
I got into Texas Instruments (TI) for PS-2. I don't want to discuss the details about TI, its achievements, culture, pioneering attitude and innovation. If you are still not convinced, you can google it.
The only thing I care about is the experience I am gaining! Oh boy, TI is awesome. Things get going pretty fast here..provided my previous experience of PS-1 at Bharat Forge, Pune (world's 2nd largest forging comapny), I feel that I have landed in heaven! Moreover, you get a stipend, which is pretty decent.
Within first two weeks, I had been through the theory, lectures, presentations and had the initial hands-on session with necessary softwares. I had a very fast ramp-up, and whoa, to be precise, on my 18th day at TI, I was introduced to my part of project. I was alloted DFT (Design for Testability) department. The purpose of this team is to ensure that the integrated cicuit (IC) or , the chip, is testable after production. This checking not just includes functional checking. eg for a 2 input AND gate, feed 1 and 1 as inputs and check if the output is 1. Its simply uneconomical to check the present chips that way. Because, these chips have hundreds of inputs. So, to check a chip, you will have to feed (2 ^ no. of inputs) patterns. That is, for 100 pins, you wil have to check the chip for 2^100 times, which is ridiculous! So, what they do, is to have an internal set of hardware which would check the chip with fewer number of patterns. DFT team 'inserts' this hardware to the mainstream architecture! My work is based upon a newer version of the OMAP architecture.
Being a techie, I would (though you would not) like to go into the details. OMAP is an architecture developed by TI which is highly used in more than 50% of the smartphones currently being marketed. Smartphones are the phones which have the ability to be programmed. That means, you can develop your own applications on a smartphone with your own style and flavor. Ofcourse, you need to own a smartphone for that! The major distinguishing factor is multimedia support. e.g nokia 1100 is not a smartphone, while nokia 6600 is a smartphone.
OMAP series has a lots of chips. I will be working on OMAP 3430. It is the most recent in the series. Consists of SGX (graphics acclerator), ISP (Image signal processor), IVA2+ (Image video-audio accelerator), high-speed USB 2.0, S-video output, 3G wireless support and a lot of stuff which is too hi-fundoo..
Now, lets turn to my project. OMAP architecture is going to be used in home appliances. My aim will be to reduce the power consumption which occurs during testing the chip. The disturbing thing in this industry is the test cost! For almost all the SoCs (System on Chip), the testing cost is almost comparable to the manufacturing cost! By the way, the testing here does not just mean to check the chip's functionality. Here, it also stands for determining where exactly, that is at which node , it is failing. Oh my God! Let's consider the average area of the chip to be about 4 sq cm (thats too high!, just for the sake of analysis, let's make the assumption). In this chip, there are millions of gates (transistors). Each gate has aleast two transistors. Each transistor has 3 nodes. And these guys determine which of these nodes is failing to work! I guess by now one can realize how intricate this whole stuff is. So, for such a thorough analysis, some hardware is introduced in the chip. Now, the question that arises is, is it worth having an extra area for this hardware at the cost of chip area which is a primary concern these days? Yes, it is. It is extremely necessary to have the chips being sent out to be reliable. The cost of a single tester is more than $5 million! And every two years, due to the advanced technology, these testers are either replaced or modified. So, if you try calculating the cost per chip for testing per second, its pretty high. So, testing time is a measure concern.
Further, there is a trade off between test time and test power consumption. So, when you reduce test-time, the test power consumption can rise too high. It can infact be more than the chip's functional power consumption! Generally, when the chip is functional, the power supply to the part of the chip which is not active is disconnected. During testing, however, this is not possible.
So, my work is mostly oriented towards reducing this test power. And, while doing that, inevitably, I have to increase the number of patterns required, thereby increasing the testing time. The basic strategy here is to bypass a few scan chains so as to reduce the power consumption. DFT team has come with such an architecture, has infact, received patents. My objective now, is to add a pipeline to this architecture,as the tools here, do not support pipelines by default. The primary use of the pipelines is for the data stability during testing.
This is how much it is now! Let's see how it goes!
Monday, August 13, 2007
Ruby on Rails
As a techie, and a guy interested in computers, I was really very happy to learn Ruby on Rails where Ruby is a scripting language and Rails is a framework.
The best thing about RoR is its agility...ya, its damn fast..you can create web-pages in minutes starting from scratch. I worked with InstantRails which is an integrated package of RoR, Mysql and Apache. This gives you an instant connectivity to database and the web.
Ruby is probably the best programming language I have ever seen. It is completely object oriented and has a tremendously clean syntax. People knowing java would really enjoy Ruby to the fullest!!
The best thing about RoR is its agility...ya, its damn fast..you can create web-pages in minutes starting from scratch. I worked with InstantRails which is an integrated package of RoR, Mysql and Apache. This gives you an instant connectivity to database and the web.
Ruby is probably the best programming language I have ever seen. It is completely object oriented and has a tremendously clean syntax. People knowing java would really enjoy Ruby to the fullest!!
Sunday, August 12, 2007
Robotics...
Amateur robotics..its really fun..
I can still imagine the the feeling which I got when I saw my line follower working!!!
Its sheer fun..
I would like to point out that amateur robotics includes the knowledge of many things..one has to have programming skills. Knowledge of controller basics is a must. One has to explore all the possibilties while choosing a particular electronic circuit, which ensues with expirience. One has to know the basics of actuators i.e. different kinds of motors.
But it reqiures tremendous efforts and beautiful imagination. Your own robot is an intricate sytem owned by you and even ruled by you!!
I can still imagine the the feeling which I got when I saw my line follower working!!!
Its sheer fun..
I would like to point out that amateur robotics includes the knowledge of many things..one has to have programming skills. Knowledge of controller basics is a must. One has to explore all the possibilties while choosing a particular electronic circuit, which ensues with expirience. One has to know the basics of actuators i.e. different kinds of motors.
But it reqiures tremendous efforts and beautiful imagination. Your own robot is an intricate sytem owned by you and even ruled by you!!
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